Since the development of using wafers to manufacture heads, increasing the yield of heads per wafer had been economically desirable. To obtain higher densities, head sizes have been decreased and wafer space allocated to fabrication, quality control and testing have been minimized. During some fabrication processes, one thirty-sixth of the usable wafer space has been dedicated to fabrication, quality control and testing.
With the continuing decrease in head size, different quality control issues arise, such as an increased significance of material deposition along the head during milling processes. Testing the heads themselves to control the process is problematic due to electrostatic discharge issues and a trend to shunt heads on the wafer. What is needed is a better way to control the wafer process while minimizing the use of wafer space for quality control and testing.